The world has changed dramatically in the two decades since the debut of what was then considered a trail-blazing space-grade processor used in NASA missions such as the comet-chasing Deep Impact spacecraft and Mars Curiosity rover vehicle. A report released by the World Economic Forum estimated that the space hardware and the space service industry is set to grow at a CAGR of 7% from 2023’s $330 billion dollars to $755 billion dollars by 2035. 

To support a diverse and growing global space market with a rapidly expanding variety of computational needs, including more autonomous applications, Microchip Technology has launched the first devices in its planned family of PIC64 High-Performance Spaceflight Computing (PIC64-HPSC) microprocessors (MPUs).

Unlike previous spaceflight computing solutions, the radiation- and fault-tolerant PIC64-HPSC MPUs, which Microchip is delivering to NASA and the broader defense and commercial aerospace industry, integrate widely adopted RISC-V CPUs augmented with vector-processing instruction extensions to support Artificial Intelligence/Machine Learning (AI/ML) applications. The MPUs also feature a suite of features and industry-standard interfaces and protocols not previously available for space applications. A growing ecosystem of partners is being assembled to expedite the development of integrated system-level solutions. This ecosystem features Single-Board Computers (SBCs), space-grade companion components, and a network of open-source and commercial software partners.

“This is a giant leap forward in the advancement and modernization of the space avionics and payload technology ecosystem,” said Maher Fahmi, corporate vice president, Microchip Technology’s communications business unit. “The PIC64-HPSC family is a testament to Microchip’s longstanding spaceflight heritage and our commitment to providing solutions built on industry-leading technologies and a total systems approach to accelerate our customers’ development process.”

The Radiation-Hardened (RH) PIC64-HPSC RH is designed to give autonomous missions the local processing power to execute real-time tasks such as rover hazard avoidance on the Moon’s surface, while also enabling long-duration, deep-space missions like Mars expeditions requiring extremely low-power consumption while withstanding harsh space conditions. For the commercial space sector, the Radiation-Tolerant (RT) PIC64-HPSC RT is designed to meet the needs of Low Earth Orbit (LEO) constellations where system providers must prioritize low cost over longevity, while also providing the high fault tolerance that is vital for round-the-clock service reliability and the cybersecurity of space assets.

PIC64-HPSC MPUs offer a variety of capabilities, many of which were not previously available for space computing applications, including:

• Space-grade 64-bit MPU architecture: Includes eight SiFive RISC-V X280 64-bit CPU cores supporting virtualization and real-time operation, with vector extensions that can deliver up to 2 TOPS (int8) or 1 TFLOPS (bfloat16) of vector performance for implementing AI/ML processing for autonomous missions.
• High-speed network connectivity: Includes a 240 Gbps Time Sensitive Networking (TSN) Ethernet switch for 10 GbE connectivity. Also supports scalable and extensible PCIe Gen 3 and Compute Express Link (CXL) 2.0 with x4 or x8 configurations and includes RMAP-compatible SpaceWire ports with internal routers.    
• Low-latency data transfers: Includes Remote Direct Memory Access (RDMA) over Converged Ethernet (RoCEv2) hardware accelerators to facilitate low-latency data transfers from remote sensors without burdening compute performance, which maximizes compute capabilities by bringing data close to the CPU.
• Platform-level defense-grade security: Implements defense-in-depth security with support for post-quantum cryptography and anti-tamper features.
• High fault-tolerance capabilities: Supports Dual-Core Lockstep (DCLS) operation, WorldGuard hardware architecture for end-to-end partitioning and isolation, and an on-board system controller for fault monitoring and mitigation.
• Flexible power tuning: Includes dynamic controls to balance the computational demands required by the multiple phases of space missions with tailored activation of functions and interfaces.

“Microchip's PIC64-HPSC family replaces the purpose-built, obsolescence-prone solutions of the past with a high-performance and scalable space-grade compute processor platform supported by the company’s vibrant and growing development ecosystem,” said Kevin Kinsella, Architect - System Security Engineering with Northrop Grumman. “This innovative and forward-looking architecture integrates the best of the past 40-plus years of processing technology advances. By uniquely addressing the three critical areas of reliability, safety, and security, we fully expect the PIC64-HPSC to see widespread adoption in air, land, and sea applications.”

In 2022, NASA selected Microchip to develop a High-Performance Spaceflight Computing processor that could provide at least 100 times the computational capacity of current spaceflight computers. This key capability would advance future space missions, from planetary exploration to lunar and Mars surface missions. The PIC64-HPSC is the result of that partnership. Representatives from NASA, Microchip, and industry leaders like Northrop Grumman will share insights about the HPSC technology and ecosystem at the IEEE Space Compute Conference 2024, July 15–19 in Mountain View, California:

• Conference Keynote – Dr. Prasun Desai, Deputy Associate Administrator, Space Technology Mission Directorate, NASA: Dr. Desai will speak about the agency’s strategy for advanced computing and investment in HPSC technology. 
• HPSC Workshop, “HPSC: Redefine What’s Possible for the Future of Space Computing” – Prasun Desai will join Microchip and JPL speakers to provide an overview of HPSC program and platform. Invited aerospace industry partner Kevin Kinsella from Northrop Grumman will also share insights on the significance of HPSC for spaceflight computing. A Q&A session will follow.

Microchip’s inaugural PIC64-HPSC MPUs were launched in tandem with the company’s PIC64GX MPUs that enable intelligent edge designs in the industrial, automotive, communications, IoT, aerospace and defense segments. With the launch of its PIC64GX MPU family, Microchip has become the only embedded solutions provider actively developing a full spectrum of 8-, 16-, 32- and 64-bit solutions.

Microchip has a broad portfolio of solutions designed for the aerospace and defense market including processing with Radiation-Tolerant (RT) and Radiation-Hardened (RH) MCUs, FPGAs and Ethernet PHYs, power devices, RF products, timing, as well as discrete components from bare die to system modules. Additionally, Microchip offers a wide range of components on the Quality Products List (QPL) to better serve its customers.

Comprehensive Ecosystem

Microchip’s new PIC64-HPSC MPUs will be supported by a comprehensive space-grade ecosystem and innovation engine that encompasses flight-capable, industry-standard SBCs, a community of open-source and commercial software partners, and the implementation of common commercial standards to help streamline and accelerate the development of system-level integrated solutions. Early members in the ecosystem include: SiFive, Moog, IDEAS-TEK, Ibeos, 3D PLUS, Micropac, Wind River, Linux Foundation, RTEMS, Xen, Lauterbach, Entrust, and many more. For information visit Microchip’s PIC64-HPSC MPU ecosystem partners webpage.

Microchip will also offer a comprehensive PIC64-HPSC evaluation platform that incorporates the MPU, an expansion card and a variety of peripheral daughter cards.

Pricing and Availability

PIC64-HPSC samples will be available to Microchip’s early access partners in 2025.

Click here to learn more about Microchip's New 64-bit HPSC Microprocessors.